重點整理
Review Slides (1)
3 types of address binding?
- compile-time : Compiler translates symbolic code into absolute code
- load-time : Compiler translates symbolic code into relocatable code
- execution-time : Compiler translates symbolic code into logical-address
- (i.e. virtual-address) code
- Special hardware (i.e. MMU) is needed for this scheme
- compile-time : Compiler translates symbolic code into absolute code
- load-time : Compiler translates symbolic code into relocatable code
- execution-time : Compiler translates symbolic code into logical-address
- (i.e. virtual-address) code
- Special hardware (i.e. MMU) is needed for this scheme
compile-time:編譯器將符號碼轉(zhuǎn)換為絕對程式碼,編譯後將記憶體位置寫死在program,速度最快但只能使用指定的記憶體,很大程度影響記憶體的彈性
load-time:編譯器將符號代碼轉(zhuǎn)換為可重定位程式碼
execution-time:編譯器將符號代碼轉(zhuǎn)換為邏輯位址
(即虛擬位址)代碼
此方案需要特殊硬體(即MMU)
logical address? physical address?
Logical address – generated by CPU (a.k.a. virtual address)
Physical address – seen by the memory module
邏輯位址 – 由 CPU 產(chǎn)生(又稱虛擬位址)
實體位址——記憶體模組看到的
virtual → physical mapping?
Memory Management Unit (MMU)
Hardware device that maps virtual to physical address
記憶體管理單元 (MMU)
將虛擬位址對應(yīng)到實體位址的硬體設(shè)備
dynamic loading? static loading?
static loading: load entire program into memory
dynamic loading: A routine is loaded into memory when it is called, need to add manually in program to load/unload library
dynamic linking? static linking?
Review Slides ( 2 )
Swapping?
A process can be swapped out of memory to a backing store, and later brought back into memory for continuous execution
進(jìn)程可以從記憶體交換到後備存儲,然後再帶回記憶體以持續(xù)執(zhí)行
Contiguous memory allocation?
- fixed-size memory allocation?
- Each process loads into one partition of fixed-size
- Degree of multi-programming is bounded by thenumber of partitions
- 每個進(jìn)程載入到固定大小的一個分割區(qū)中
- 多程式設(shè)計的程度受分區(qū)數(shù)量限制
- Each process loads into one partition of fixed-size
- Degree of multi-programming is bounded by thenumber of partitions
- 每個進(jìn)程載入到固定大小的一個分割區(qū)中
- 多程式設(shè)計的程度受分區(qū)數(shù)量限制
- variable-size memory allocation?first-fit, best-fit, worst-fit?
- Hole: block of contiguous free memory
- Holes of various size are scattered in memory
- First-fit – allocate the 1st hole that fits
- Best-fit – allocate the smallest hole that fits (Must search through the whole list )
- Worst-fit – allocate the largest hole
- 洞:連續(xù)的空閒記憶體區(qū)塊
- 記憶體中散佈著大小不一的洞
- 首次適配 – 分配第一個適合的孔
- 最佳擬合 - 分配適合的最小孔(必須搜尋整個清單)
- 最差擬合 – 分配最大的孔
- Hole: block of contiguous free memory
- Holes of various size are scattered in memory
- First-fit – allocate the 1st hole that fits
- Best-fit – allocate the smallest hole that fits (Must search through the whole list )
- Worst-fit – allocate the largest hole
- 洞:連續(xù)的空閒記憶體區(qū)塊
- 記憶體中散佈著大小不一的洞
- 首次適配 – 分配第一個適合的孔
- 最佳擬合 - 分配適合的最小孔(必須搜尋整個清單)
- 最差擬合 – 分配最大的孔
External & internal fragmentation?
External fragmentation: total free memory space is big enough to satisfy a request, but is not contiguous, Occur in variable-size allocation
compaction?
Review Slides ( 3 )
Memory frame? page? typical page size?
- Divide physical memory into fixed-sized blocks called frames
- Divide logical address space into blocks of the same size calledpages
- typical page size is 4KB
- 將物理記憶體劃分為固定大小的區(qū)塊(稱為幀)
- 將邏輯位址空間分割成相同大小的區(qū)塊(稱為頁)
- 典型頁面大小為 4KB
Page table? virtual → physical translation?
virtual → physical translation through MMU
What is PTBR register? When to update it?
- The physical memory address of the page table
- The PTBR value is stored in PCB (Process Control Block)
- Changing the value of PTBR during Context-switch
- 頁表的實體記憶體位址
- PTBR值儲存在PCB(Process Control Block)中
- 在Context-switch期間更改 PTBR 的值
Memory reads # for each reference?
使用 PTBR,每次記憶體引用都會導(dǎo)致 2 次記憶體讀取,一次用於頁表,一次用於實際位址
- associative memory
- TLB
Associative Memory
All memory entries can be accessed at the same time
- Each entry corresponds to an associative register
- Typical number of entries: 64 ~ 1024
A cache for page table shared by all processes
TLB must be flushed after a context switch
- Otherwise, TLB entry must has a PID field(address-space identifiers (ASIDs) )
由關(guān)聯(lián)記憶體 (HW) 實作的翻譯後備緩衝區(qū) (TLB) (HW)
聯(lián)想記憶
所有記憶體條目可以同時存取
- 每個條目對應(yīng)一個關(guān)聯(lián)暫存器
- 典型條目數(shù):64 ~ 1024
所有進(jìn)程共享的頁表緩存
上下文切換後必須刷新 TLB
- 否則,TLB 條目必須具有 PID 欄位(位址空間識別碼 (ASID))
memory protection by page table?
- valid, invalid bits?
每個頁都與頁表中的一組保護(hù)位相關(guān)聯(lián)
page table memory structure?
- hierarchical → 2-level, 3-level, etc
- Break up the logical address space into multiple pagetables
- 將邏輯位址空間分解為多個頁表
- hash table → linked list
- Commonly-used for address > 32 bits
- Virtual page number is hashed into a hash table
- 常用於 > 32 位元的位址
- 虛擬頁號被散列到哈希表中
- inverted page table
- Maintains NO page table for each process
- Maintains a frame table for the whole memory
- 不為每個行程維護(hù)頁表
- 維護(hù)整個記憶體的幀表
How are pages shared by different processes?
Paging allows processes share common code, which must be reentrant
Shared code must appear in the same location in the logical address space of all processes
分頁允許進(jìn)程共享公共代碼,這些代碼必須是可重入的
共享程式碼必須出現(xiàn)在所有程序的邏輯位址空間中的相同位置
Review Slides ( 5 )
Segmentation vs. Paging?
Paging
segmentation
Length
Fixed
Varied
Fragmentation
Internal
External
Table entry
Page number→frame number
Seg ID → (base addr, limit length)
View
Physical memory
User program
Paged segmentation?
- Apply segmentation in logical address space
Paging allows processes share common code, which must be reentrant
Shared code must appear in the same location in the logical address space of all processes
分頁允許進(jìn)程共享公共代碼,這些代碼必須是可重入的
共享程式碼必須出現(xiàn)在所有程序的邏輯位址空間中的相同位置
Review Slides ( 5 )
Segmentation vs. Paging?
Paging | segmentation | |
Length | Fixed | Varied |
Fragmentation | Internal | External |
Table entry | Page number→frame number | Seg ID → (base addr, limit length) |
View | Physical memory | User program |
Paged segmentation?
- Apply segmentation in logical address space
- Apply paging in physical address space
- 在邏輯位址空間中應(yīng)用分段
- 在實體位址空間中應(yīng)用分頁
- 在邏輯位址空間中應(yīng)用分段
- 在實體位址空間中應(yīng)用分頁